In the last decade microarchitecture design innovations such as speculation and out-of-order superscalar execution have dramatically improved microprocessor efficiency and brought substantial performance gains. One such innovation is Simultaneous Multithreading (SMT) which allows multiple threads to share core resources concurrently. In SMT processors, multiple threads share the fetch bandwidth of the machine either on a cycle by cycle basis or even aggressively on a single cycle basis according to the SMT implementation. In order to efficiently share the machine resources, fetch units need to be carefully designed. The fetch mechanism directly affects the quality of instructions fed to the machine pipeline and accordingly the flow of instructions executed. A naive fetch mechanism will result in inefficient resource allocation, poorly utilized machine resources, and as a result, sub-optimal machine throughput. The dominant factor in all of the fetch mechanisms proposed is to schedule the best candidate applications for fetching on a cycle by cycle basis. The assumption in most fetch policies proposed in the literature is that the running applications have equal priorities. In reality, applications running concurrently are not equally important and even some of them, such as real time applications, may require hard deadlines to finish their tasks. OS designers have given users many levels of priorities for their applications to define the importance of the running jobs. In single thread processors, achieving the job/application priorities is very simple and is achievable by simple time quantum sharing of the microprocessor. On the other hand achieving the same goal in SMT machines is significantly more challenging, given the fine grain sharing of the machine resources. One known solution to this problem is the approach taken in the article by Allan Snavely, Dean M. Tullsen, Geoff Voelker entitled Symbiotic Jobscheduling with Priorities for a Simultaneous Multithreading Processor. Sigmetrics 2002 [Allan02] in which SMT processors could run in either single threaded or multithreaded (SMT) mode. The time quantum for each application, defined by its priority, is divided into two parts—one for the application to run with others in SMT mode and the second for the application to run alone to achieve its time quantum.
Another solution to the thread priority problem in SMT processors is the one proposed in U.S. Pat. No. 6,658,447 B2 Priority Based Simultaneous Multi-Threading. [Erik03]. In this disclosure, the inventor scales the thread hardware execution heuristics based on each application Operating System (OS) priority.
The inventors in US Patent 2006/0184946 Thread Priority Method, Apparatus, and Computer Program Product for Ensuring Processing Fairness in Simultaneous Multi-Threading Microprocessors [James06] have implemented a method to strictly achieve the OS thread priority for two threads on a cycle by cycle basis.
WO02067116A2 describes a method for controlling thread priority on a multithreaded processor using one level thread priority mechanism.
WO00036487A2 describes one-level priority scheme for instruction scheduling. WO09921089A1 describes a method to switch between threads in a multi-threaded processor.